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FPGA Engineer (Hybrid- APG)
$101k-123k (estimate)
Full Time 1 Day Ago
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Fairwinds Technologies, L is Hiring a FPGA Engineer (Hybrid- APG) Near Herndon, VA

 

FPGA Engineer (Mid to Senior Level)

Position Overview:

Fairwinds Technologies is seeking a skilled FPGA (Field-Programmable Gate Array) Engineer with expertise in Vivado, Xilinx MPSoC (Multiprocessor System-on-Chip), Xilinx RFSoC (Radio Frequency System-on-Chip), Verilog, and VHDL (VHSIC Hardware Description Language) to join our team. The ideal candidate will play a critical role in the design, development, and testing of FPGA-based solutions. This position offers an exciting opportunity to work on cutting-edge projects, collaborate with cross-functional teams, and contribute to the advancement of FPGA technology.

Key Responsibilities:

- Design and implement FPGA-based solutions using Vivado and Xilinx MPSoC/RFSoC platforms.

- Develop and optimize Verilog and VHDL code to meet project requirements and performance targets.

- Conduct thorough testing of FPGA designs, including functional testing, performance testing, and verification/validation activities.

- Collaborate with hardware and software teams to integrate FPGA solutions into larger systems.

- Document design specifications, test procedures, and results for internal and external stakeholders.

- Provide technical guidance and mentorship to junior engineers.

Required Skills:

- Proficiency in Vivado software and extensive experience with Xilinx MPSoC and RFSoC platforms.

- Strong capabilities in FPGA design, specifically for synthesis and place & route (PAR) processes.

- Robust programming skills in Verilog and VHDL.

- Familiarity with FPGA design methodologies and tools.

- Expertise in using hardware description languages (HDL) for FPGA synthesis and verification.

- Experience with HDL verification and simulation tools in Vivado, and third-party tools such as Modelsim.

- Proficient in solving timing closure challenges for high-speed programmable logic designs.

- Skilled in defining FPGA placement and routing constraints to optimize timing closure and routing efficiency.

- Ability to handle FPGA designs involving multiple clock domains.

- Proficiency with scripting languages such as TCL to streamline Vivado environments.

- Experience integrating Vivado block designs with HDL-based designs.

- Expertise in designing, simulating, implementing, and testing industry-standard communication buses such as PCIe and AXI.

- Excellent problem-solving and analytical skills.

- Effective communication skills and a collaborative mindset.

Desired Skills:

- Knowledge of network protocols (e.g., Ethernet), communication interfaces (e.g., SPI, UART), and signal processing algorithms.

- Experience with hardware-in-the-loop (HIL) testing and simulation tools.

- Familiarity with version control systems such as Git or SVN and issue tracking tools.

- Understanding of software-defined radio (SDR) and basic Digital Signal Processing (DSP) principles.

- Experience with implementing lab debug support tools in programmable logic, such as integrated logic analyzers (ILAs).

- Experience with System Verilog.

Education & Experience:

- Bachelor’s Degree in Electrical Engineering, Computer Engineering, or a related field.

- A minimum of 7 years of experience in FPGA design and development.

Company Offer:

Fairwinds Technologies offers a stimulating work environment, competitive compensation, and opportunities for professional growth. If you are passionate about FPGA technology and eager to contribute to innovative projects, we encourage you to apply and join our team.

Position Type/Expected Hours of Work

This is a full time, exempt position. 

Work Authorization/Security Clearance

Must be a U.S citizen with the ability to obtain a valid US DoD security clearance.

AAP/EEO Statement

Fairwinds Technologies, LLC is an Equal Opportunity Employer – M/F/Veteran/Disability/Sexual Orientation/Gender Identity.

Location

Must be located within the DMV area. This position is Hybrid with travel to APG. 

Travel

This position will require Travel to various CONUS locations up to 25%. 

Job Summary

JOB TYPE

Full Time

SALARY

$101k-123k (estimate)

POST DATE

05/01/2024

EXPIRATION DATE

06/30/2024

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